The manufacture of integrated circuits is a complicated and expensive process sometimes involving dozens of process steps. To ensure that this manufacturing effort proceeds with the maximum efficiency, every source of deviation or defect should be sought out and eliminated.
One of the critical steps in IC manufacturing is photolithography, which is used to define key features of an integrated circuit, including active regions, transistor gates, and signal and interconnect lines. In photolithography, a photosensitive polymer photoresist is deposited on a silicon substrate, exposed by a patterned light focused by a lens, then chemically developed. Depending on the type of photoresist, during developing the exposed photoresist is removed (positive photoresist) or retained in preference to the unexposed photoresist (negative photoresist), which results in the formation of a patterned photoresist.
As is well known, the light pattern applied to the photoresist layer is obtained by exposing the photoresist to actinic (exposing) radiation through a mask (reticle). The mask includes opaque and transparent portions defaming a pattern. An image of the pattern on the mask is thus transferred to the photoresist which is then developed in order to define a corresponding pattern in the photoresist. If the photoresist is a positive type photoresist, the portions of the photoresist which are exposed to the radiation, after being developed, are removed, hence leaving the underlying portions of the substrate exposed for a subsequent etching step. In contrast, the developed positive photoresist remains over the nonexposed portions. Hence a subsequent etching step will define the mask pattern in the underlying substrate as defined by the mask image in the photoresist. Using the patterned photoresist as a mask, further IC processing steps can then occur, possibly including etching and ion implantation, oxide growth or metallization for signal lines or interconnects.
Ideally, IC features, e.g., lines, created by photolithography would have straight, vertical sidewalls. However, in reality, the sidewalls of a photolithographically defined IC feature can deviate substantially from straight and vertical, which can cause problems in subsequent IC processing steps. Defects in the lens, known as lens aberrations, may result in such sidewall deviations or defects, among others. A particular type of lens aberration, known as coma lens aberration, is of particular interest and is used as an example herein, since it can result in a change of the sidewall profiles, particularly resulting in sidewalls having angular deviations from vertical or design angles, either by inwardly sloping (undercutting) or by being outwardly sloped.
Photoresist patterns may be used to characterize the performance of optical exposure systems, especially the projection lens. These exposure systems are used to form the above-described features on integrated circuits. Test patterns such as a dense line/space structure allow the performance to be measured in a standard way. However, extensive use of test patterns expends much valuable wafer space.
In the prior art for test purposes, to make sure that the photolithographic process is working as desired, it is therefore necessary to examine the sidewalls of the photoresist features after exposure and development for angle, curvature and any undesirable artifacts present. It was also frequently necessary to make extensive use of test patterns. One prior art approach is to form the photoresist layer, expose it through the mask, develop the photoresist and then physically slice the photoresist and the underlying wafer to form a cross section which can be examined by a scanning electron microscope. This is very time consuming and costly and of course destroys the wafer.
An alternative is to make "top down" measurements, without slicing, using a scanning electron microscope or an optical microscope. However, this does not give much useful information about the feature sidewalls, since this method does not allow access to the sidewalls.
Atomic force microscopy (AFM) has been applied for measurement of sidewall angles, as a method for detecting defects in IC devices during manufacture and as a method for verifying process models. However, AFM has not been applied to detect specific sidewall angle defects as a basis for detecting and identifying lens aberrations such as the coma lens aberration. Any information obtained from AM measurements of sidewall angles has not been used to identify sources of defects in parts of the lithography system other than the photomask or reticle.
The various known methods for verifying IC processing steps have primarily focused attention on the mask and procedures for developing and removing the photoresist. As features of IC devices become progressively smaller, attention must be directed to additional elements of the IC processing steps in order to provide maximum efficiency and minimum defects or deviations from design parameters. Thus, the need exists for a method to detect and identify the location of lens aberrations, which can be a significant source of deviations or defects in IC devices.